Energy Efficient SerDes Design Presentation

I came across this low power IO presentation from WMED 2011 titled “Energy Efficient Multi-GB/s I/O: Circuit and System Design Techniques ” presented by Bryan Casper from Intel.

There is a lot of information in this presentation and it really shows the full design challenges of IO design to system design when considering power. There are some good slides on power delivery and Signal Integrity as well.

Well worth the read.

This entry was posted on Thursday, June 16th, 2011 at 7:18 am and is filed under circuit design, power integrity. You can follow any responses to this entry through the RSS 2.0 feed. You can leave a response, or trackback from your own site.

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This is the developer blog for the IBIS Modeling application SharkSim. Stay informed about the latest software updates, upgrades, app note releases and learn more about IBIS Modeling and Signal Integrity.

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Tim Coyle is the lead developer of SharkSim and is also the President of the Signal Consulting Group LLC that develops and distributes SharkSim as well as providing Signal and Power Integrity consulting services to clients around the world. Tim has over ten years experience as a hardware designer performing Signal and Power Integrity analysis on various designs including backplanes and memory systems. He has a strong background in simulation and modeling and regularly consults and presents on using IBIS models for Signal Integrity analysis. He is also the founder and Editor In Chief of XrossTalk Magazine which is a digital magazine covering topics in Signal and Power Integrity analysis.